1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to performing stuck-at testing of memories.
2. Description of the Related Art
For a variety of reasons, it is desirable to operate an integrated circuit at the lowest supply voltage possible while providing correct operation and the desired level of performance. However, there are limits to the amount by which the supply voltage may be reduced.
Reducing the supply voltage often reduces the performance of the circuits supplied by that supply voltage. If some circuits in the integrated circuit are busy (and thus need to perform at or near peak operation), the supply voltage must generally remain at a relatively high level. Other, less busy circuits could operate at reduced voltages (or could even be powered off if idle). Additionally, in some cases, the logic circuitry can operate at a lower voltage than a corresponding on-chip memory can operate and still be read and written correctly. One technique to permit variation in the supply voltages on the integrated circuit is to divide the integrated circuit into voltage “domains” that are supplied by separate supply voltages that can be independently adjusted. That is, the supply voltage for circuits in a given voltage domain is the supply voltage connected to that voltage domain. Thus, some voltages may be reduced (or even powered down completely) while others remain high for full speed operation.
Once voltage domains that may be at different levels are introduced, it is often required to level shift signals from one domain to another to ensure proper operation in the receiving voltage domain. If the supply voltage from the source voltage domain of a level shifter is powered down, all input signals may be reduced to ground voltage, which may result in an inaccurate signal being provided to the receiving voltage domain by the level shifter. Inaccurate operation can result.